/*
 * Copyright (c) 2025 HPMicro
 *
 * SPDX-License-Identifier: BSD-3-Clause
 *
 */

#ifndef _HPM_BOARD_H
#define _HPM_BOARD_H
#include <stdio.h>
#include "hpm_common.h"
#include "hpm_soc.h"
#include "hpm_soc_feature.h"
#include "hpm_clock_drv.h"
#include "pinmux.h"
#include "hpm_trgm_drv.h"
#include "hpm_gptmr_drv.h"
#if !defined(CONFIG_NDEBUG_CONSOLE) || !CONFIG_NDEBUG_CONSOLE
#include "hpm_debug_console.h"
#endif

#define BOARD_NAME          "hpm5e-ec-dev"
#define BOARD_UF2_SIGNATURE (0x0A4D5048UL)
#define BOARD_CPU_FREQ      (480000000UL)

#define SEC_CORE_IMG_START CORE1_ILM_LOCAL_BASE

#ifndef BOARD_RUNNING_CORE
#define BOARD_RUNNING_CORE HPM_CORE0
#endif

/* uart section */
#define BOARD_APP_UART_BASE       HPM_UART1
#define BOARD_APP_UART_IRQ        IRQn_UART1
#define BOARD_APP_UART_BAUDRATE   (115200UL)
#define BOARD_APP_UART_CLK_NAME   clock_uart1
#define BOARD_APP_UART_RX_DMA_REQ HPM_DMA_SRC_UART1_RX
#define BOARD_APP_UART_TX_DMA_REQ HPM_DMA_SRC_UART1_TX

/* usb cdc acm uart section */
#define BOARD_USB_CDC_ACM_UART            BOARD_APP_UART_BASE
#define BOARD_USB_CDC_ACM_UART_CLK_NAME   BOARD_APP_UART_CLK_NAME
#define BOARD_USB_CDC_ACM_UART_TX_DMA_SRC BOARD_APP_UART_TX_DMA_REQ
#define BOARD_USB_CDC_ACM_UART_RX_DMA_SRC BOARD_APP_UART_RX_DMA_REQ

/* uart lin sample section */
#define BOARD_UART_LIN                 BOARD_APP_UART_BASE
#define BOARD_UART_LIN_IRQ             BOARD_APP_UART_IRQ
#define BOARD_UART_LIN_CLK_NAME        BOARD_APP_UART_CLK_NAME
#define BOARD_UART_LIN_TX_PORT         GPIO_DI_GPIOC
#define BOARD_UART_LIN_TX_PIN          (16U)                         /* PC16 should align with used pin in pinmux configuration */
#define BOARD_UART_LIN_PLB_TRGM_IN_SRC HPM_TRGM0_INPUT_SRC_TRGM0_P05 /* align with used pin in pinmux configuration */

/* plb lin baudrate detection */
#define BOARD_PLB_TRGM_FILTER_GPIO_INPUT0 HPM_TRGM0_FILTER_SRC_TRGM0_P00
#define BOARD_PLB_TRGM_DMA_REQ0           HPM_TRGM0_DMA_SRC_TRGM_0

#if !defined(CONFIG_NDEBUG_CONSOLE) || !CONFIG_NDEBUG_CONSOLE
#ifndef BOARD_CONSOLE_TYPE
#define BOARD_CONSOLE_TYPE CONSOLE_TYPE_UART
#endif

#if BOARD_CONSOLE_TYPE == CONSOLE_TYPE_UART
#ifndef BOARD_CONSOLE_UART_BASE
#if BOARD_RUNNING_CORE == HPM_CORE0
#define BOARD_CONSOLE_UART_BASE       HPM_UART0
#define BOARD_CONSOLE_UART_CLK_NAME   clock_uart0
#define BOARD_CONSOLE_UART_IRQ        IRQn_UART0
#define BOARD_CONSOLE_UART_TX_DMA_REQ HPM_DMA_SRC_UART0_TX
#define BOARD_CONSOLE_UART_RX_DMA_REQ HPM_DMA_SRC_UART0_RX
#else
#define BOARD_CONSOLE_UART_BASE       HPM_UART11
#define BOARD_CONSOLE_UART_CLK_NAME   clock_uart11
#define BOARD_CONSOLE_UART_IRQ        IRQn_UART11
#define BOARD_CONSOLE_UART_TX_DMA_REQ HPM_DMA_SRC_UART11_TX
#define BOARD_CONSOLE_UART_RX_DMA_REQ HPM_DMA_SRC_UART11_RX
#endif
#endif
#define BOARD_CONSOLE_UART_BAUDRATE (115200UL)
#endif
#endif

/* rtthread-nano finsh section */
#define BOARD_RT_CONSOLE_BASE     BOARD_CONSOLE_UART_BASE
#define BOARD_RT_CONSOLE_CLK_NAME BOARD_CONSOLE_UART_CLK_NAME
#define BOARD_RT_CONSOLE_IRQ      BOARD_CONSOLE_UART_IRQ

/* nor flash section */
#define BOARD_FLASH_BASE_ADDRESS (0x80000000UL)
#define BOARD_FLASH_SIZE         (1 * SIZE_1MB)

/* i2c section */
#define BOARD_APP_I2C_BASE     HPM_I2C3
#define BOARD_APP_I2C_IRQ      IRQn_I2C3
#define BOARD_APP_I2C_CLK_NAME clock_i2c3
#define BOARD_APP_I2C_DMA      HPM_HDMA
#define BOARD_APP_I2C_DMAMUX   HPM_DMAMUX
#define BOARD_APP_I2C_DMA_SRC  HPM_DMA_SRC_I2C3

/* dma section */
#define BOARD_APP_XDMA      HPM_XDMA
#define BOARD_APP_HDMA      HPM_HDMA
#define BOARD_APP_XDMA_IRQ  IRQn_XDMA
#define BOARD_APP_HDMA_IRQ  IRQn_HDMA
#define BOARD_APP_DMAMUX    HPM_DMAMUX
#define TEST_DMA_CONTROLLER HPM_XDMA
#define TEST_DMA_IRQ        IRQn_XDMA

/* gptmr section */
#define BOARD_GPTMR                   HPM_GPTMR0
#define BOARD_GPTMR_IRQ               IRQn_GPTMR0
#define BOARD_GPTMR_CHANNEL           2
#define BOARD_GPTMR_DMA_SRC           HPM_DMA_SRC_GPTMR0_2
#define BOARD_GPTMR_CLK_NAME          clock_gptmr0
#define BOARD_GPTMR_PWM               HPM_GPTMR0
#define BOARD_GPTMR_PWM_CHANNEL       2
#define BOARD_GPTMR_PWM_DMA_SRC       HPM_DMA_SRC_GPTMR0_2
#define BOARD_GPTMR_PWM_CLK_NAME      clock_gptmr0
#define BOARD_GPTMR_PWM_IRQ           IRQn_GPTMR0
#define BOARD_GPTMR_PWM_SYNC          HPM_GPTMR0
#define BOARD_GPTMR_PWM_SYNC_CHANNEL  3
#define BOARD_GPTMR_PWM_SYNC_CLK_NAME clock_gptmr0

#define BOARD_GPTMR_QEI          HPM_GPTMR1
#define BOARD_GPTMR_QEI_CLK_NAME clock_gptmr1
#define BOARD_GPTMR_QEI_CH_GROUP gptmr_qei_ch_group_23
#define BOARD_GPTMR_QEI_PHMAX    4000

/* user button 0 */
#define BOARD_APP_BUTTON0_CTRL        HPM_GPIO0
#define BOARD_APP_BUTTON0_INDEX       GPIO_DI_GPIOA
#define BOARD_APP_BUTTON0_PIN         2
#define BOARD_APP_BUTTON0_IRQ         IRQn_GPIO0_A

/* user button 1 */
#define BOARD_APP_BUTTON1_CTRL        HPM_GPIO0
#define BOARD_APP_BUTTON1_INDEX       GPIO_DI_GPIOA
#define BOARD_APP_BUTTON1_PIN         3
#define BOARD_APP_BUTTON1_IRQ         IRQn_GPIO0_A
#define BOARD_BUTTON_PRESSED_VALUE    1

/* user led 1 */
#define BOARD_APP_LED1_CTRL        HPM_GPIO0
#define BOARD_APP_LED1_INDEX       GPIO_DI_GPIOD
#define BOARD_APP_LED1_PIN         1

/* user led 2 */
#define BOARD_APP_LED2_CTRL        HPM_GPIO0
#define BOARD_APP_LED2_INDEX       GPIO_DI_GPIOD
#define BOARD_APP_LED2_PIN         2

/* buzzer */
#define BOARD_APP_BUZZER_CTRL      HPM_GPIO0
#define BOARD_APP_BUZZER_INDEX     GPIO_DI_GPIOC
#define BOARD_APP_BUZZER_PIN       15

/* spi section */
#define BOARD_APP_SPI_BASE              HPM_SPI1
#define BOARD_APP_SPI_CLK_NAME          clock_spi1
#define BOARD_APP_SPI_IRQ               IRQn_SPI1
#define BOARD_APP_SPI_SCLK_FREQ         (80000000UL)
#define BOARD_APP_SPI_ADDR_LEN_IN_BYTES (1U)
#define BOARD_APP_SPI_DATA_LEN_IN_BITS  (8U)
#define BOARD_APP_SPI_RX_DMA            HPM_DMA_SRC_SPI1_RX
#define BOARD_APP_SPI_TX_DMA            HPM_DMA_SRC_SPI1_TX
#define BOARD_SPI_CS_GPIO_CTRL          HPM_GPIO0
#define BOARD_SPI_CS_PIN                IOC_PAD_PC11
#define BOARD_SPI_CS_ACTIVE_LEVEL       (0U)

/* Flash section */
#define BOARD_APP_XPI_NOR_XPI_BASE     (HPM_XPI0)
#define BOARD_APP_XPI_NOR_CFG_OPT_HDR  (0xfcf90002U)
#define BOARD_APP_XPI_NOR_CFG_OPT_OPT0 (0x00000006U)
#define BOARD_APP_XPI_NOR_CFG_OPT_OPT1 (0x00001000U)

/* ADC section */
#define BOARD_APP_ADC16_NAME     "ADC0"
#define BOARD_APP_ADC16_BASE     HPM_ADC0
#define BOARD_APP_ADC16_IRQn     IRQn_ADC0
#define BOARD_APP_ADC16_CH_1     (1U)
#define BOARD_APP_ADC16_CLK_NAME (clock_adc0)
#define BOARD_APP_ADC16_CLK_BUS  (clk_adc_src_ahb0)

#define BOARD_APP_ADC16_HW_TRIG_SRC_CLK_NAME clock_pwm0
#define BOARD_APP_ADC16_HW_TRIG_SRC          HPM_PWM0
#define BOARD_APP_ADC16_HW_TRGM              HPM_TRGM0
#define BOARD_APP_ADC16_HW_TRGM_IN           HPM_TRGM0_INPUT_SRC_PWM0_TRGO_0
#define BOARD_APP_ADC16_HW_TRGM_OUT_SEQ      TRGM_TRGOCFG_ADC0_STRGI
#define BOARD_APP_ADC16_HW_TRGM_OUT_PMT      TRGM_TRGOCFG_ADCX_PTRGI0A

#define BOARD_APP_ADC16_PMT_TRIG_CH ADC16_CONFIG_TRG0A

/* CAN section */
#define BOARD_APP_CAN_BASE HPM_MCAN1
#define BOARD_APP_CAN_IRQn IRQn_MCAN1

/*
 * timer for board delay
 */
#define BOARD_DELAY_TIMER          (HPM_GPTMR3)
#define BOARD_DELAY_TIMER_CH       0
#define BOARD_DELAY_TIMER_CLK_NAME (clock_gptmr3)

#define BOARD_CALLBACK_TIMER          (HPM_GPTMR3)
#define BOARD_CALLBACK_TIMER_CH       1
#define BOARD_CALLBACK_TIMER_IRQ      IRQn_GPTMR3
#define BOARD_CALLBACK_TIMER_CLK_NAME (clock_gptmr3)

#ifndef BOARD_SHOW_CLOCK
#define BOARD_SHOW_CLOCK 1
#endif
#ifndef BOARD_SHOW_BANNER
#define BOARD_SHOW_BANNER 1
#endif

/* enet section */
#define BOARD_ENET_RGMII_RST_GPIO       HPM_GPIO0
#define BOARD_ENET_RGMII_RST_GPIO_INDEX GPIO_DO_GPIOF
#define BOARD_ENET_RGMII_RST_GPIO_PIN   (27U)

#define BOARD_ENET_RGMII        HPM_ENET0
#define BOARD_ENET_RGMII_TX_DLY (0U)
#define BOARD_ENET_RGMII_RX_DLY (0U)

#define BOARD_ENET_RGMII_PTP_CLOCK   (clock_ptp0)
#define BOARD_ENET_RGMII_PPS0_PINOUT (0)

/* FreeRTOS Definitions */
#define BOARD_FREERTOS_TIMER          HPM_GPTMR1
#define BOARD_FREERTOS_TIMER_CHANNEL  1
#define BOARD_FREERTOS_TIMER_IRQ      IRQn_GPTMR1
#define BOARD_FREERTOS_TIMER_CLK_NAME clock_gptmr1

#define BOARD_FREERTOS_TICK_SRC_PWM          HPM_PWM0
#define BOARD_FREERTOS_TICK_SRC_PWM_IRQ      IRQn_PWM0
#define BOARD_FREERTOS_TICK_SRC_PWM_CLK_NAME clock_mot0
#define BOARD_FREERTOS_TICK_SRC_PWM_COUNTER  pwm_counter_0
#define BOARD_FREERTOS_TICK_SRC_PWM_SHADOW   PWMV2_SHADOW_INDEX(0)

/* Threadx Definitions */
#define BOARD_THREADX_TIMER          HPM_GPTMR1
#define BOARD_THREADX_TIMER_CHANNEL  1
#define BOARD_THREADX_TIMER_IRQ      IRQn_GPTMR1
#define BOARD_THREADX_TIMER_CLK_NAME clock_gptmr1

#define BOARD_THREADX_LOWPOWER_TIMER          HPM_PTMR
#define BOARD_THREADX_LOWPOWER_TIMER_CHANNEL  1
#define BOARD_THREADX_LOWPOWER_TIMER_IRQ      IRQn_PTMR
#define BOARD_THREADX_LOWPOWER_TIMER_CLK_NAME clock_ptmr

/* uC/OS-III Definitions */
#define BOARD_UCOS_TIMER          HPM_GPTMR1
#define BOARD_UCOS_TIMER_CHANNEL  1
#define BOARD_UCOS_TIMER_IRQ      IRQn_GPTMR1
#define BOARD_UCOS_TIMER_CLK_NAME clock_gptmr1

/* EtherCAT definitions */
/* ECAT PORT0 must support */
#define BOARD_ECAT_SUPPORT_PORT1 (1)
#define BOARD_ECAT_SUPPORT_PORT2 (0)

/* invert esc port link signal, require low level for linkup */
#define BOARD_ECAT_PORT0_LINK_INVERT true  /* depend on hardware */
#define BOARD_ECAT_PORT1_LINK_INVERT false /* depend on hardware */

#define BOARD_ECAT_PHY0_RESET_GPIO            HPM_GPIO0
#define BOARD_ECAT_PHY0_RESET_GPIO_PORT_INDEX GPIO_DO_GPIOD
#define BOARD_ECAT_PHY0_RESET_PIN_INDEX       (0U)

#define BOARD_ECAT_PHY1_RESET_GPIO            HPM_GPIO0
#define BOARD_ECAT_PHY1_RESET_GPIO_PORT_INDEX GPIO_DO_GPIOD
#define BOARD_ECAT_PHY1_RESET_PIN_INDEX       (0U)

#define BOARD_ECAT_OUT1_GPIO            HPM_GPIO0
#define BOARD_ECAT_OUT1_GPIO_PORT_INDEX GPIO_DO_GPIOD
#define BOARD_ECAT_OUT1_GPIO_PIN_INDEX  (1U)

#define BOARD_ECAT_OUT2_GPIO            HPM_GPIO0
#define BOARD_ECAT_OUT2_GPIO_PORT_INDEX GPIO_DO_GPIOD
#define BOARD_ECAT_OUT2_GPIO_PIN_INDEX  (2U)

#define BOARD_ECAT_OUT_ON_LEVEL (1)

#define BOARD_ECAT_IN1_GPIO            HPM_GPIO0
#define BOARD_ECAT_IN1_GPIO_PORT_INDEX GPIO_DO_GPIOD
#define BOARD_ECAT_IN1_GPIO_PIN_INDEX  (1U)

#define BOARD_ECAT_IN2_GPIO            HPM_GPIO0
#define BOARD_ECAT_IN2_GPIO_PORT_INDEX GPIO_DO_GPIOD
#define BOARD_ECAT_IN2_GPIO_PIN_INDEX  (2U)

#define BOARD_ECAT_NMII_LINK0_CTRL_INDEX 7
#define BOARD_ECAT_NMII_LINK1_CTRL_INDEX 5

/* ECAT PHY address definition */
#define BOARD_ECAT_PHY_ADDR_OFFSET (1U)
#define BOARD_ECAT_PORT0_PHY_ADDR  (0U) /* actual PHY address = BOARD_ECAT_PHY_ADDR_OFFSET + BOARD_ECAT_PORT0_PHY_ADDR */
#define BOARD_ECAT_PORT1_PHY_ADDR  (1U) /* actual PHY address = BOARD_ECAT_PHY_ADDR_OFFSET + BOARD_ECAT_PORT1_PHY_ADDR */

/* the address of ecat flash emulate eeprom component in flash */
// #define BOARD_ECAT_FLASH_EMULATE_EEPROM_ADDR (0x80000) /* offset 512K */
#define BOARD_ECAT_FLASH_EMULATE_EEPROM_ADDR (900 * 1024) /* offset 900K */

#define BOARD_OWR          HPM_OWR1
#define BOARD_OWR_CLK_NAME clock_owire1
#define BOARD_OWR_CLK      clock_get_frequency(BOARD_OWR_CLK_NAME);

#define BOARD_APP_CLK_REF_PIN_NAME "P5[22] (PC30)"
#define BOARD_APP_CLK_REF_CLK_NAME clock_ref1

#if defined(__cplusplus)
extern "C" {
#endif /* __cplusplus */

typedef void (*board_timer_cb)(void);

void board_init(void);
void board_init_console(void);
void board_init_uart(UART_Type *ptr);
uint32_t board_init_i2c_clock(I2C_Type *ptr);
void board_init_i2c(I2C_Type *ptr);
void board_init_can(MCAN_Type *ptr);
void board_init_gpio_pins(void);
void board_init_spi_pins(SPI_Type *ptr);
void board_init_spi_pins_with_gpio_as_cs(SPI_Type *ptr);
void board_write_spi_cs(uint32_t pin, uint8_t state);
void board_init_owr_pins(OWR_Type *ptr);

/* Initialize SoC overall clocks */
void board_init_clock(void);
uint32_t board_init_femc_clock(void);
uint32_t board_init_uart_clock(UART_Type *ptr);
uint32_t board_init_spi_clock(SPI_Type *ptr);
uint32_t board_init_can_clock(MCAN_Type *ptr);
uint32_t board_init_adc_clock(void *ptr, bool clk_src_bus);
void board_init_owr_clock(OWR_Type *ptr);
void board_init_adc16_pins(void);
void board_init_usb(USB_Type *ptr);
uint8_t board_get_enet_dma_pbl(ENET_Type *ptr);
hpm_stat_t board_reset_enet_phy(ENET_Type *ptr);
hpm_stat_t board_init_enet_pins(ENET_Type *ptr);
hpm_stat_t board_init_enet_rmii_reference_clock(ENET_Type *ptr, bool internal);
hpm_stat_t board_init_enet_rgmii_clock_delay(ENET_Type *ptr);
hpm_stat_t board_init_enet_ptp_clock(ENET_Type *ptr);
hpm_stat_t board_enable_enet_irq(ENET_Type *ptr);
hpm_stat_t board_disable_enet_irq(ENET_Type *ptr);

/*
 * @brief Initialize PMP and PMA for but not limited to the following purposes:
 *      -- non-cacheable memory initialization
 */
void board_init_pmp(void);
void board_delay_us(uint32_t us);
void board_delay_ms(uint32_t ms);
void board_timer_create(uint32_t ms, board_timer_cb cb);
void board_timer_create_us(uint32_t us, board_timer_cb cb);
void board_ungate_mchtmr_at_lp_mode(void);

void board_init_ethercat(ESC_Type *ptr);

void board_init_switch_led(void);
void board_init_clk_ref_pin(void);
uint32_t board_init_gptmr_clock(GPTMR_Type *ptr);

#if defined(__cplusplus)
}
#endif /* __cplusplus */
#endif /* _HPM_BOARD_H */
